Engineer for the Implementation of the TCDS Run Controller
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You are an Electrical or Electronics Engineer with a background and interest in Digital electronics.
CMS is a general-purpose particle physics experiment operated by an international collaboration (see cms.cern.ch). The EP-CMD group has major responsibilities for the Phase-2 upgrade of the CMS trigger and DAQ system (DAQ), which will operate at the High-Luminosity LHC starting in 2029.
One of the central aspects of the Phase-2 upgrade of the CMS DAQ is the distribution of high-precision timing information to the various component and sub-detectors of the experiment. This, along with the distribution of the trigger and fast-control signals, is the task of the Trigger and Timing Control and Distribution System (TCDS for short). The TCDS system is composed of custom electronics using state-of-the art FPGAs.
Your work will focus on the development of the ‘run controller’ firmware. The run controller orchestrates the data-taking at the level of the individual trigger and timing signals, which are then distributed to DAQ and Timing Hub (DTH), communicating with the off-detector electronics of the different sub-detectors.
The primary goal of the project is to identify and implement the optimal approach for the Phase-2 TCDS run controller, maintaining maximum operational flexibility while limiting the use of FPGA resources.
We are looking for a candidate that in particular:
- Will work with the TCDS team to familiarize themselves with the current TCDS system and its functions and limitations, and to eventually participate in its operation;
- Will implement firmware in a collaborative environment and participate in its integration and testing, as well as provide support to other groups working on the Phase-2 test and development systems;
- Is flexible and problem-solving oriented, while rigorous in the development and documentation of code.
- You are a national of a CERN Member or Associate Member State;
- You have a Master’s degree and between 2 and 6 years’ experience or PhD with up to 3 years of relevant experience in Electronic Engineering or Applied Physics or other related field;
- You should have a working knowledge of English or French.
Skills and/or knowledge:
Proven experience in:
- Design, development and testing of high-speed digital electronics;
- Firmware design and development for modern FPGAs (VHDL).
Basic knowledge of:
- Trigger and data acquisition systems;
- High-speed optical links and low-jitter clock distribution systems.
What we offer:
- An employment contract of in principle 24 months, with a possible extension up to 36 months;
- On-the-job and formal training at CERN as well as in-house language courses for English and/or French;
- A monthly stipend ranging between 6050 and 6650 Swiss Francs per month (net of tax);
- Coverage by CERN’s comprehensive health scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund;
- Depending on your individual circumstances: installation grant; family, child and infant allowances; payment of travel expenses at the beginning and end of contract;
- 30 days of paid leave per year.
How to Apply:
You will need the following documents to complete your application:
- A CV;
- A scanned PDF of your most recent relevant qualification;
- We recommend to add two recent letters of recommendation, giving an overview of your academic and/or professional achievements. You can upload these letters at the time of application if you have them to hand. You will also be provided with a link as soon as you have submitted your application to forward to your referees to upload their letters confidentially.
The earliest expected start date for selected candidates is May 2023.
Ready to take part? Then please submit your application by 23 January 2023 at midnight (12.00 AM CEST).